Faʻaleleia FPGA PCB Board Design
Fa'amatalaga
2 Punaoa Uiga
2.1 uiga malosi:
[1] Faʻaaogaina le USB_OTG, USB_UART ma le EXT_IN tolu auala tuʻuina atu;
[2] Sapalai eletise numera: O le gaosiga o le eletise eletise o le 3.3V, ma o le maualuga o le BUCK circuit e faʻaaogaina e tuʻuina atu ai le mana mo ARM / FPGA / SDRAM, ma isi;
[3] O le FPGA autu o loʻo faʻamalosia e le 1.2V, ma faʻaaogaina foi se eletise BUCK maualuga;
[4] FPGA PLL o loʻo i ai se numera tele o taʻaloga analog, ina ia faʻamautinoa le faʻatinoga o le PLL, matou te faʻaogaina le LDO e tuʻuina atu ai le mana analog mo PLL;
[5] STM32F767IG o lo'o tu'uina atu ai se fa'amatalaga tuto'atasi fa'atusa e tu'uina atu ai se voluma fa'asino mo le ADC / DAC i luga o le masini;
[6] Tuuina atu le mataʻituina o le mana ma le faʻatusatusaina;
2.2 ARM uiga:
[1] STM32F767IG maualuga fa'atinoga fa'atasi ai ma le tele o taimi ole 216M;
[2] 14 fa'alauteleina I/O maualuga;
[3] Teleplexing ma I/O, e aofia ai le ARM fausia-i totonu SPI / I2C / UART / TIMER / ADC ma isi galuega tauave;
[4] E aofia ai le 100M Ethernet, televave USB-OTG atinaʻe ma le USB i le UART galuega mo le debugging;
[5] E aofia ai le 32M SDRAM, TF card interface, USB-OTG interface (e mafai ona faʻafesoʻotaʻi i le U disk);
[6] 6P FPC debugging interface, fetuutuunai tulaga e fetuutuunai i le lautele 20p interface;
[7] Fa'aaogāina o feso'ota'iga pasi fa'atusa 16-bit;
2.3 Vaega FPGA:
[1] Altera lona fa-tupulaga Afa fa'asologa FPGA EP4CE15F23C8N fa'aaogaina;
[2] E oʻo atu i le 230 faʻaopoopoga I/O maualuga;
[3] FPGA faʻalauteleina le SRAM lua-chip ma le gafatia o le 512KB;
[4] Faiga Fa'atonu: lagolago JTAG, AS, PS mode;
[5] Lagolago le utaina o le FPGA e ala i le ARM configuration;AS PS galuega e tatau ona filifilia e ala i osooso;
[6] Fa'aaogāina o feso'ota'iga pasi fa'atusa 16-bit;
[7] FPGA debug taulaga: FPGA JTAG taulaga;
2.4 O isi vaega:
[1] O le USB o le iCore4 e tolu auala galue: mode DEVICE, mode HOST ma le OTG mode;
[2] O le ituaiga Ethernet interface o le 100M duplex atoa;
[3] E mafai ona filifilia le faiga o le sapalai eletise e ala i le osooso, o le USB interface e faʻamalosia saʻo, pe ala i le pine ulu (5V power supply);
[4] E lua fa'amau tuto'atasi e pulea e le ARM ma le FPGA;
[5] O moli e lua o le LED o le iCore4 heterogeneous dual-core alamanuia pulega laupapa e tolu lanu: mumu, lanumeamata ma le lanumoana, lea e pulea e le ARM ma le FPGA faasologa;
[6] Faʻaaogaina le tioata passive 32.768K e tuʻuina atu le RTC mo le taimi tonu mo le faiga;